1. Technical Field
The present invention relates to a power converter that enables suppression of surge voltage generated due to a switching action of a semiconductor switching element.
2. Background Art
In general, when driving an alternating current motor, the voltage of a direct current power source is converted in a voltage type PWM inverter into a pulse voltage sequence equivalent to a sine wave (a waveform that becomes a sine wave when components equal to or greater than the switching frequency are removed), and the pulse width modulated sinusoidal voltage is applied to the motor.
FIG. 8 is a schematic configuration diagram of a system that drives a motor using this kind of method. In FIG. 8, 1 is a direct current power source, 2 is a three-phase voltage type PWM inverter (hereafter referred to as an inverter) connected to the direct current power source 1, 3 is a control circuit for controlling the inverter 2, 3a is a pulse width modulation unit included in the control circuit 3, and 4 is a motor driven by the inverter 2.
The inverter 2 is configured of a three-phase bridge formed of a U-phase wherein semiconductor switching elements Su and Sx are connected in series, a V-phase wherein Sv and Sy are connected in series, and a W-phase wherein Sw and Sz are connected in series.
The inverter 2 and motor 4 are connected by wiring, and a resistance component and inductance component exist in the wiring. Furthermore, floating capacitance exists between each phase of the wiring between the inverter 2 and motor 4 and between each phase of the wiring and the ground. In FIG. 8, Ls indicates the inductance of the wiring between the inverter 2 and motor 4, while Cs indicates the floating capacitance between each phase of wiring and the ground or a reference potential. A depiction of the resistance component of each phase of wiring or the like is omitted.
Herein, a positive side terminal of the direct current power source 1 is P, while a negative side terminal is N. Also, a connection midpoint of the semiconductor switching elements Su and Sx of the inverter 2 is U, a connection midpoint of Sv and Sy is V, and a connection midpoint of Sw and Sz is W. Also, three-phase input terminals of the motor 4 are U1, V1, and W1.
This kind of motor drive system is such that the control circuit 3 generates a signal in the pulse width modulation unit 3a for controlling the turning on and off of the semiconductor switching elements Su to Sw and Sx to Sz in the inverter 2 using a PWM (pulse width modulation) operation that compares the magnitude of the values of a sine wave (modulation signal) and a triangular wave (carrier signal). The inverter 2 switches the on or off status of the semiconductor switching elements Su to Sw and Sx to Sz in accordance with the control signal generated by the control circuit 3, thereby converting the voltage of the direct current power source 1 into a square wave voltage with a pulse width modulated pulse form. The square wave voltage with the pulse width modulated pulse form is output by the output terminals U, V, and W of the inverter 2, and is applied to the input terminals U1, V1, and W1 of the motor 4 via the wiring.
Meanwhile, the inductor Ls and floating capacitor Cs exist in the wiring between the inverter 2 and motor 4, as shown in FIG. 8. When the square wave voltage with the pulse width modulated pulse form is applied to an LC circuit configured of the inductor Ls and floating capacitor Cs, a resonance phenomenon occurs between the inverter 2 and LC circuit.
FIG. 9 is a diagram showing resonance voltage generated between the input terminals U1 and V1 of the motor 4 when the semiconductor switching element Su of the inverter 2 performs an on-off action. Hereafter, the potential reference point of each terminal is taken to be the N point of FIG. 8.
When the control signal for the semiconductor switching element Su changes from Low to High, the semiconductor switching element Su changes from an off-state to an on-state. When the semiconductor switching element Su changes from an off-state to an on-state, the U terminal voltage of the inverter 2 changes from 0(V) to a voltage Ed(V) of the direct current power source. The U terminal voltage of the inverter 2 is applied to the input terminal U1 of the motor 4. At this time, LC resonance is generated among the inverter 2, the inductor Ls and the floating capacitor Cs, and resonance voltage is applied between the U1 and V1 terminals of the motor 4.
This resonance voltage forms surge voltage whose oscillation diminishes with time owing to the resistance component (not shown) of the wiring, or the like, between the inverter 2 and motor 4, but the maximum value of the surge voltage reaches approximately twice that of the voltage Ed(V) of the direct current power source 1. Further, it is known that this excessive surge voltage and a temporal rate of change dv/dt thereof cause dielectric breakdown of the motor 4.
A surge voltage suppression device formed of a rectifier configured of a diode bridge in a motor input terminal portion and a capacitor and resistor connected in parallel to either end of a direct current terminal of the rectifier has been proposed as a method of preventing this kind of motor dielectric breakdown caused by excessive surge voltage (for example, refer to PTL 1, identified below). Also, as an improvement on this, a surge voltage suppression device wherein current flowing through the resistor connected to the direct current terminal of the rectifier is controlled by a semiconductor switching element has been proposed (for example, refer to PTL 2, identified below). Also, a surge voltage suppression method whereby surge voltage energy is returned to the power source by a direct current terminal of a rectifier being connected to an input terminal of an inverter, and the like, has been proposed (for example, refer to PTL 3, identified below). Also, a surge voltage suppression method whereby a reactor is connected between an inverter and a motor, and a serial body of a resistor and a capacitor is connected in parallel to the reactor, has been proposed (for example, refer to PTL 4, identified below).
PTL 1: JP-A-8-23682
PTL 2: JP-A-2006-115667
PTL 3: JP-A-2010-136564
PTL 4: JP-A-2007-166708
However, with the previously described methods, it is necessary to add a surge voltage suppression device formed of a rectifier, resistor, capacitor, and the like, or a surge voltage suppression circuit formed of a reactor, resistor, and capacitor, in order to suppress surge voltage, which leads to an increase in size and increase in cost of the power converter.